Experimental C implementation of “Breaking the Sorting Barrier for Directed Single-Source Shortest Paths” by Ran Duan, Jiayi Mao, Xiao Mao, Xinkai Shu, and Longhui Yin (STOC 2025)

A Physically Scalable, Ultra-Wide RISC-V Vector Processor Design for Fast and Efficient Computation on Long Vectors

SpacemiT K3 X100 A100 - random snippets from this RISC-V CPU

MPEG-1 Video decoder, MP2 Audio decoder and MPEG-PS Demuxer in pure Go

Simple expositional mpeg-1 decoder written in pure go; not a production quality decoder. Transliterated from an older C version I wrote.

The University of Bristol HPC Simulation Engine

All pdfs of Victor Eijkhout's Art of HPC books and courses

A set of tests for pseudorandom number generators

Intelligent Storage Acceleration Library

Example of RISC-V Vector programming

Differential CPU fuzzing framework from the paper "RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs".

New generation entropy codecs : Finite State Entropy and Huff0

Simple H.264 decoder

SIMD-accelerated Rabin-Karp hashing

fbDOOM with RISC-V Vector optimizations

FanFicFare is a tool for making eBooks from stories on fanfiction and other web sites.

Source code that accompanies The CUDA Handbook.

The Modified Version of Ara2 for Enhanced Lookup Table (LUT) Performance, compatible with the RISC-V Vector Extension Version 1.0

InstLatX64_Demo

Run x86 and x86-64 games on RISC-V Linux

A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code. (Results)

A Chisel-based Permutation Network for Long Vectors in RVV