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🔊 让小爱音箱「听见你的声音」,解锁无限可能。

Rust 2,336 264 Updated Mar 22, 2026

A 277 KB no_std WebAssembly JIT engine that goes head-to-head with V8 and Wasmtime.

Rust 42 3 Updated Mar 27, 2026

Verilog

Verilog 2 Updated Feb 22, 2026
C 6 2 Updated Apr 11, 2021

完全使用FPGA实现的高速DAP

Verilog 11 2 Updated Mar 19, 2026

An optimized JPEG decoder suitable for microcontrollers and PCs.

C 591 64 Updated Mar 13, 2026

SqlSugar adapter for Casbin.NET. An efficient way to store and manage access control policies in various databases. With this library, Casbin can load policy from SqlSugar supported databases or sa…

C# 2 Updated Feb 9, 2026

QR/bar code scanner for the Browser

JavaScript 276 30 Updated Nov 9, 2023
C 7 4 Updated Oct 29, 2025

An open-source AI-first Identity and Access Management (IAM) /AI MCP gateway and auth server with web UI supporting MCP, A2A, OAuth 2.1, OIDC, SAML, CAS, LDAP, SCIM, WebAuthn, TOTP, MFA, Face ID, G…

Go 13,232 1,611 Updated Mar 27, 2026

a win10 IDD graphic driver for esp32-s2 usb display, also can modify for other MCU device with usb

C 192 61 Updated Sep 25, 2025

Control Midea devices via Cloud from Home Assistant

Python 176 31 Updated Mar 26, 2026
Shell 15 5 Updated Dec 13, 2023

通用IO测试工程,用于捡垃圾测试IO。与BSDL需要对引脚输入不同,该工程只需要确定时钟输入,然后自动向每个IO发送指定字符串,因此只需要将串口接入任意IO查看输出即可

17 1 Updated Jul 17, 2025
C 21 6 Updated Jul 4, 2025

MicroPython - a lean and efficient Python implementation for microcontrollers and constrained systems

C 21,583 8,760 Updated Mar 26, 2026

一个逗比写的各种逗比脚本~

Shell 1,079 1,119 Updated Sep 22, 2022

Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or SoC design without using a physical cable.

C 269 91 Updated Nov 13, 2025

experiments relating to the encapsulation of data within other data

Verilog 7 Updated Feb 13, 2014

JumpServer is an open-source Privileged Access Management (PAM) platform that provides DevOps and IT teams with on-demand and secure access to SSH, RDP, Kubernetes, Database and RemoteApp endpoints…

Python 30,214 5,693 Updated Mar 27, 2026

FT2232D emulator

C 39 6 Updated Sep 29, 2024

A FPGA friendly 32 bit RISC-V CPU implementation

Assembly 3,086 496 Updated Feb 11, 2026

一款集多功能于一体的嵌入式系统开发工具

C 124 53 Updated Dec 23, 2025

MCP Server to expose the GDB debugging capabilities

Rust 63 14 Updated Sep 17, 2025

Verilog Ethernet components for FPGA implementation

Verilog 2,899 812 Updated Feb 27, 2025

帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目

5,341 787 Updated May 15, 2022

A small, light weight, RISC CPU soft core

Verilog 1,529 179 Updated Dec 8, 2025
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